Silicon Labs /Series0 /EFM32GG /EFM32GG330F512 /DMA /CHENS

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Interpret as CHENS

31282724232019161512118743000000000000000000000000000000000000000000 (CH0ENS)CH0ENS0 (CH1ENS)CH1ENS0 (CH2ENS)CH2ENS0 (CH3ENS)CH3ENS0 (CH4ENS)CH4ENS0 (CH5ENS)CH5ENS0 (CH6ENS)CH6ENS0 (CH7ENS)CH7ENS0 (CH8ENS)CH8ENS0 (CH9ENS)CH9ENS0 (CH10ENS)CH10ENS0 (CH11ENS)CH11ENS

Description

Channel Enable Set Register

Fields

CH0ENS

Channel 0 Enable Set

CH1ENS

Channel 1 Enable Set

CH2ENS

Channel 2 Enable Set

CH3ENS

Channel 3 Enable Set

CH4ENS

Channel 4 Enable Set

CH5ENS

Channel 5 Enable Set

CH6ENS

Channel 6 Enable Set

CH7ENS

Channel 7 Enable Set

CH8ENS

Channel 8 Enable Set

CH9ENS

Channel 9 Enable Set

CH10ENS

Channel 10 Enable Set

CH11ENS

Channel 11 Enable Set

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